Sample selection for visual domain adaptation via sparse coding

Visual domain adaptation has attracted much attention and has made great achievement in recent years. It deals with the problem of distribution divergence between source and target domains. Current methods mostly focus on transforming images from different domains into a common space to minimize the distribution divergence. However, there are many irrelevant source samples for target domain even after the transformation. In order to eliminate the irrelevant samples, we develop a sample selection algorithm using sparse coding theory. We do the sample selection in a common subspace of source and target data to find as many as relevant source samples. In the common subspace, data characteristics are preserved by using graph regularization. Therefore, we can select the most relevant samples for our target image classification task. Moreover, in order to build a discriminative classifier for the target domain, we use not only the common part of source and target domains learned in the common subspace but also the specific part of target domain. The algorithm can be extended to handle samples from multiple source domains. Experimental results show that our visual domain adaptation method on the image classification tasks can be very effective for the state-of-the-art datasets.     

3D holoscopic image coding scheme using HEVC with Gaussian process regression

3D holoscopic image, also known as integral imaging, light field imaging and plenoptic imaging, can provide a natural and fatigue-free 3D visualization. However, a large amount of data is required to represent the 3D holoscopic content. Therefore, efficient coding schemes for such particular type of image are needed. In this paper, we propose a Gaussian process regression based prediction scheme to compress the 3D holoscopic image. In the proposed scheme, the coding block and its prediction supports are modeled as a Gaussian process (GP) and Gaussian process regression (GPR) is used to obtain a better prediction of the coding block. Limited searching windows in horizontal and vertical directions are used to obtain the prediction supports, and a filtration method is designed to judge the reliability of the obtained prediction supports. Moreover, in order to alleviate the high complexity caused by GPR, a sparsification method is also put forward. Experimental results demonstrate the advantage of the proposed scheme for 3D holoscopic image coding in terms of different quality metrics as well as the visual quality of the views rendered from decompressed 3D holoscopic content, compared to the HEVC intra-prediction method and several other prediction methods in this field.     

Lower-error and area-efficient antilogarithmic converters with bit-correction schemes

In this article, we have proposed fast lower-error and area-efficient antilogarithmic converters. By employing new approximation schemes with two-region shift-and-add operations, our proposed converters can perform high-speed conversions from logarithmic numbers to binary numbers. Synthesis results show that our proposed converters can achieve time savings of over 32.5% and can save 42.3% of the area used compared with previously proposed methods. In addition, the percent error ranges for various logarithmic number system (LNS)-based operations used by our proposed logarithmic processor are lower than those of previous methods. Our proposed converters can be applied to LNS-based processors to ease the tremendous computation overhead and boost the performance.     

HEVC-based 3D holoscopic video coding using self-similarity compensated prediction

Holoscopic imaging, also known as integral, light field, and plenoptic imaging, is an appealing technology for glassless 3D video systems, which has recently emerged as a prospective candidate for future image and video applications, such as 3D television. However, to successfully introduce 3D holoscopic video applications into the market, adequate coding tools that can efficiently handle 3D holoscopic video are necessary. In this context, this paper discusses the requirements and challenges for 3D holoscopic video coding, and presents an efficient 3D holoscopic coding scheme based on High Efficiency Video Coding (HEVC). The proposed 3D holoscopic codec makes use of the self-similarity (SS) compensated prediction concept to efficiently explore the inherent correlation of the 3D holoscopic content in Intra- and Inter-coded frames, as well as a novel vector prediction scheme to take advantage of the peculiar characteristics of the SS prediction data. Extensive experiments were conducted, and have shown that the proposed solution is able to outperform HEVC as well as other coding solutions proposed in the literature. Moreover, a consistently better performance is also observed for a set of different quality metrics proposed in the literature for 3D holoscopic content, as well as for the visual quality of views synthesized from decompressed 3D holoscopic content.     

传真通信中MMR编码译码的实现

MMR编码技术是传真通信在发送端对图像进行分解、处理、调制，而在接收端进行解调、处理和传真图像合成而采用的一种编码方法，通过基本的软件语言来实现MMR编码与译码的基本功能。     

Interval analysis applied to the maximum loading point of electric power systems considering load data uncertainties

This paper proposes a simple and efficient power flow method to calculate, in an interval manner, the main variables corresponding to the maximum loading point, under load data uncertainties. The resulting interval nonlinear system of equations is solved using Krawczyk method. The proposed methodology is implemented in the Matlab environment using the Intlab toolbox. Results are compared with those obtainable by Monte Carlo simulations. IEEE 30 bus system and a South-southeastern Brazilian network are used to validate the proposed methodology.     

A 3D-DCT video encoder using advanced coding techniques for low power mobile device

The three-dimensional discrete cosine transform (3D-DCT) has been researched as an alternative to existing dominant video standards based on motion estimation and compensation. Since it does not need to search macro block for inter/intra prediction, 3D-DCT has great advantages for complexity. However, it has not been developed well because of poor video quality while video standards such as H.263(+) and HEVC have been blooming. In this paper, we propose a new 3D-DCT video coding as a new video solution for low power mobile technologies such as Internet of Things (IoT) and Drone. We focus on overcoming drawbacks reported in previous research. We build a complete 3D-DCT video coding system by adopting existing advanced techniques and devising new coding algorithms to improve overall performance of 3D-DCT. Experimental results show proposed 3D-DCT outperforms H.264 low power profiles while offering less complexity. From GBD-PSNR, proposed 3D-DCT provides better performance by average 4.6 dB.     

A high-performance VLSI architecture for reconfigurable FIR using distributed arithmetic

In this paper, we have analyzed the register complexity of direct-form and transpose-form structures of FIR filter and explored the possibility of register reuse. We find that direct-form structure involves significantly less registers than the transpose-form structure, and it allows register reuse in parallel implementation. We analyze further the LUT consumption and other resources of DA-based parallel FIR filter structures, and find that the input delay unit, coefficient storage unit and partial product generation unit are also shared besides LUT words when multiple filter outputs are computed in parallel. Based on these finding, we propose a design approach, and used that to derive a DA-based architecture for reconfigurable block-based FIR filter, which is scalable for larger block-sizes and higher filter-lengths. Interestingly, the number of registers of the proposed structure does not increase proportionately with the block-size. This is a major advantage for area-delay and energy efficient high-throughput implementation of reconfigurable FIR filters of higher block-sizes. Theoretical comparison shows that the proposed structure for block-size 8 and filter-length 64 involves 60% more flip-flops, 6.2 times more adders, 3.5 times more AND-OR gates, and offers 8 times higher throughput. ASIC synthesis result shows that the proposed structure for block-size 8 and filter-length 64 involves 1.8 times less area-delay product (ADP) and energy per sample (EPS) than the existing design, and it can support 8 times higher throughput. The proposed structure for block sizes 4 and 8, respectively, consumes 38% and 50% less power than the exiting structure for the same throughput rates on average for different supply voltages.     

Improved macroblock level rate control for the spatially scalable extension of H.264/AVC

An improved rate control algorithm, designed for scalable video coders incorporating interlayer prediction, is proposed. Firstly, a Rate Distortion (RD) model for interlayer prediction involving the spatial enhancement layers is devised. An optimised Mean Absolute Difference (MAD) prediction model for the spatial enhancement layers that considers both the MAD from the spatial base layer in the same frame and the MAD from the corresponding macroblock in previous frames is also proposed. Simulation results show that the resulting algorithm produces accurate rate control with an average bit rate error of less than 0.26%. Compared with the JVT-W043 default rate control algorithm of the JSVM, the proposed algorithm improves the average PSNR by up to 0.53 dB or reduces the bit rate by an average of 10.95%. Furthermore, the proposed algorithm can be combined with the existing rate control scheme for H.264/AVC, resulting in further improvements.